論文発表

Mitsue Takahashi, Shouyu Wang, Ken Takeuchi and Shigeki Sakai, “Fe-NAND Flash-memory Application of Ferroelectric Gate FETs”, F10-6, MRS (Materials Research Society) Fall Meeting, December 2009.

Shinji Noda, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A 1.2V Operation 2.43 Times Higher Power Efficiency Adaptive Charge Pump Circuit with Optimized VTH at Each Pump Stage for Ferroelectric (Fe)-NAND Flash Memories,” pp.162-163, International Conference on Solid State Devices and Materials (SSDM), October 2009.

Ryoji Yajima, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A Negative Word-line Voltage Step-Down Erase Pulse Scheme with ΔVTH=1/6 ΔVERASE for Enterprise SSD Application Ferroelectric (Fe)-NAND Flash Memories,” pp.1196-1197, International Conference on Solid State Devices and Materials (SSDM), October 2009.

Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Effect of Resistance of TSV’s on Performance of Boost Converter for Low Power 3D SSD with NAND Flash Memories,” IEEE International Conference on 3D System Integration (3D IC), September 2009.

Ken Takeuchi, “Solid State Drive (SSD) and Memory Subsystem Innovation,” CMOS Emerging Technologies, September 2009.【招待講演】

Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A Zero VTH Memory Cell Ferroelectric-NAND Flash Memory with 32% Read Disturb, 24% Program Disturb, 10% Data Retention Improvement for Enterprise SSD,” IEEE European Solid-State Device Research Conference (ESSDERC), pp.225-228, September 2009.

Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Inductor Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp.87-91, August 2009.

Teruyoshi Hatanaka, Ryoji Yajima, Takeshi Horiuchi, Shouyu Wang, Xizhen Zhang, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “Ferroelectric(Fe)-NAND Flash Memory with Non-volatile Page Buffer for Data Center Application Enterprise Solid-State Drives (SSD),” IEEE Symp. on VLSI Circuits, pp.78-79, June 2009.

Shuhei Tanakamaru and Ken Takeuchi, “A 60pJ, 3-Clock Rising Time, VTH Loss Compensated Word-line Booster Circuit for 0.5V Power Supply Embedded/Discrete DRAMs”, IEEE International Memory Workshop, pp.1-2, May 2009.

Ken Takeuchi, “3D LSI Design for MEMS Application,” Japan-Taiwan CMOS MEMS Workshop, pp.113-131, March 2009.【招待講演】

Ken Takeuchi, “Memory System Innovation with SSD and Emerging Memories,” IEEE International Solid-State Circuits Conference (ISSCC), Memory Forum F-1, February 2009. 【招待講演】

Koichi Ishida, Tadashi Yasufuku, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “A 1.8V 30nJ Adaptive Program-Voltage (20V) Generator for 3D-Integrated NAND Flash SSD,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 238-239, February 2009.

Teruyoshi Hatanaka, Ryoji Yajima, Shigeki Sakai, Mitsue Takahashi, Qiu-Hong Li, Takeshi Horiuchi, Shouyu Wang, Kwi-Young Yun, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “Highly Scalable Fe(Ferroelectric)-NAND Cell with MFIS(Metal-Ferroelectric-Insulator-Semiconductor) Structure for Sub-10 nm Tera-Bit Capacity NAND Flash Memories,” International Symposium on Secure-Life Electronics, January 2009.

Ken Takeuchi, “Solid-State Drive (SSD) and Memory System Innovation,” Shanghai Jiao Tong University–University of Tokyo Joint Symposium on Electronics, Information Technology, and Electrical Engineering, October 2008.

Ken Takeuchi, “Emerging 3D-Memory Device,” 2008 Taiwan & Japan Semiconductor Technology Forum, October 2008.【招待講演】

Ken Takeuchi, “Emerging Nanoscale Non-volatile Semiconductor Memories,” Bilateral Workshop on Nanoscale Systems, pp.6-9, July, 2008.

Ken Takeuchi, “Solid-State Drive (SSD) and Memory System Innovation,” University of Tokyo-INRIA-Ecole des Mines Paris-INRETS Joint Symposium, pp.111-139, July, 2008.

Ken Takeuchi, “Novel Co-design of NAND Flash Memory and NAND Flash Controller Circuits for sub-30nm Low-Power High-Speed Solid-State Drives (SSD),” IEEE Symp. on VLSI Circuits, pp.124-125, June 2008.

Shigeki Sakai, Mitsue Takahashi, Ken Takeuchi, Qiu-Hong Li, Takeshi Horiuchi, Shouyu Wang, Kwi-Young Yun, Makoto Takamiya, and Takayasu Sakurai, “Highly Scalable Fe(Ferroelectric)-NAND Cell with MFIS(Metal-Ferroelectric-Insulator-Semiconductor) Structure for Sub-10nm Tera-Bit Capacity NAND Flash Memories,” IEEE Non-volatile Semiconductor Memory Workshop (NVSMW), pp. 103-104, May 2008.

Ken Takeuchi, “Circuit design of NAND flash memories,” International Symposium on Secure-Life Electronics, pp. 153-159, March 2008.