Kasidit Toprasertpong, Eishin Nako, Zeyu Wang, Chihiro Matsui, Ryosho Nakane, Ken Takeuchi, Mitsuru Takenaka and Shinichi Takagi, “HfZrO2-based ferroelectric FETs for emerging computing technologies,” 2021 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES (IWDTF), November 15, 2021. 【招待講演】

Ken Takeuchi, “Co-design of non-volatile memory devices, circuits and systems in AI era,” 2021 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES (IWDTF), November 14, 2021. 【基調講演】

Ken Takeuchi, “How to heterogeneously integrate PIM for Edge AI?,” IEEE Asian Solid-State Circuits Conference (A-SSCC) Panel PIM (Processing in Memory) will go with Analog or Digital?, November 8, 2021. 【招待講演】

Chihiro Matsui, Kazuhide Higuchi, Shunsuke Koshino and Ken Takeuchi, “Event-Driven SRAM Computation-in-Memory with Partitioned WL Activation for 3D Heterogeneous Integration of Event-based Vision Sensor”, International Conference on Solid State Devices and Materials (SSDM), September 7, 2021.

Naoko Misawa, Kenta Taoka, Chihiro Matsui and Ken Takeuchi, “Small Array Area, Memory Error Tolerant ReRAM Computation-in-Memory with Log-encoding Simulated Annealing for Combinational Optimization Problems”, International Conference on Solid State Devices and Materials (SSDM), September 8, 2021.

Kazuhide Higuchi, Chihiro Matsui, Naoko Misawa and Ken Takeuchi, “Comprehensive Computation-in-Memory Simulation Platform with Non-volatile Memory Non-Ideality Consideration for Deep Learning Applications”, International Conference on Solid State Devices and Materials (SSDM), September 8, 2021.

Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, and and Ken Takeuchi, “Energy-Efficient Reliable HZO FeFET Computation-in-Memory with Local Multiply & Global Accumulate Array for Source-Follower & Charge-Sharing Voltage Sensing,” IEEE Symp. on VLSI Technology, June 18, 2021.

Ken Takeuchi, “Memory Circuit & Technology Co-Design for AI Applications,” Silicon Nanoelectronics Workshop (SNW), June 13, 2021. 【基調講演】

Daiki Kojima and Ken Takeuchi, “Error Suppression of Last-Programmed Word-Line for Real Usage of 3D-NAND Flash Memory,” IEEE International Symposium on Circuits and Systems (ISCAS), May 27, 2021.

Mamoru Fukuchi, Shun Suzuki, Kyosuke Maeda, Chihiro Matsui and Ken Takeuchi, “BER Evaluation System Considering Device Characteristics of TLC and QLC NAND Flash Memories in Hybrid SSDs with Real Storage Workloads,” IEEE International Symposium on Circuits and Systems (ISCAS), May 26, 2021.

Kenta Taoka, Naoko Misawa, Shunsuke Koshino, Chihiro Matsui and Ken Takeuchi, “Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-Memory,” IEEE International Memory Workshop, May 21, 2021.

Ken Takeuchi, “Can memory provide performance breakthrough for traditional architectures?”, IEEE International Solid-State Circuits Conference (ISSCC) Panel What Technologies Will Shape the Future of Computing?, February 19, 2021. 【招待講演】

Chihiro Matsui and Ken Takeuchi, “SLC Flash & ReRAM Heterogeneous Memory System with Multi-Tier 5G Network & Device Co-Design for Smart Manufacturing”, International Conference on Solid State Devices and Materials (SSDM), September 30, 2020.

Ken Takeuchi, “Heterogeneously Integrated Adaptive Storage System for 5G Network”, International Conference on Solid State Devices and Materials (SSDM) Short Course, September 27, 2020.【招待講演】

Chihiro Matsui, Shun Suzuki and Ken Takeuchi, “Spatial Color-Perceived Data Control of NAND Flash for Image Detection,” IEEE Silicon Nanoelectronics Workshop (SNW), June 13-14, 2020.

Shun Suzuki, Hiroki Aihara, Keita Mizushina, Shin Yamaguchi and Ken Takeuchi, “Approximate 3D-TLC NAND Flash Write with Initial Error Injection for Application-level Reliability Improvement of Machine Learning-based Computing,” IEEE Silicon Nanoelectronics Workshop (SNW), June 13-14, 2020.

Keita Mizushina, Shun Suzuki, Hiroki Aihara and Ken Takeuchi, “3840x Reliability Enhanced Robust NAND flash Optimized to Store Weight Data for Object Detection and Semantic Segmentation of Self-driving Car at High Temperature,” IEEE Silicon Nanoelectronics Workshop (SNW), June 13-14, 2020.

Hiroki Aihara, Kyosuke Maeda, Shun Suzuki and Ken Takeuchi, “Extremely Biased Error Correction Method to Reduce Read Disturb Errors of 3D-TLC NAND Flash Memories by 60%,” IEEE International Memory Workshop Poster, May 18, 2020.

Yusaku Hine, Reika Kinoshita, Yoshiki Kakuta and Ken Takeuchi, “Data Allocation Algorithm based on Write and Read Frequency for Double Asymmetric-latency SCM SSD,” IEEE International Memory Workshop Poster, May 20, 2020.

Masaki Abe, Chihiro Matsui, Keita Mizushina, Shun Suzuki and Ken Takeuchi, “Computational Approximate Storage with Neural Network-based Error Patrol of 3D-TLC NAND Flash Memory for Machine Learning Applications,” IEEE International Memory Workshop Poster, May 20, 2020.