International Conference
  • Kousuke Miyaji, Yasuhiro Shinozuka, Shinji Miyano and Ken Takeuchi, “Statistical VTH Shift Variation Self-Convergence Scheme Using Near Threshold VWL Injection for Local Electron Injected Asymmetric Pass Gate Transistor SRAM,” IEEE Custom Integrated Circuits Conference (CICC), No. T9, September 2011.

  • Mitsue Takahashi, Xizhen Zhang, Le Van Hai, Kang Yan, Wei Zhang, Kousuke Miyaji, Ken Takeuchi and Shigeki Sakai, “NAND Flash Memory by Ferroelectric-Gate Field -Effect-Transistor Integration,” International Symposium on Integrated Functionalities (ISIF), August 2011.

  • Ken Takeuchi, “Green High Performance Storage Class Memory & NAND Flash Memory Hybrid SSD System,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp.369-370, August 2011. 【招待講演】

  • Ken Takeuchi, “ReRAM as High-Speed and High Capacity Storage Class Memory,” IEEE Symp. on VLSI Circuits, Special Evening Session: NVM Technology and New Application Opportunities, June 2011. 【招待講演】

  • Teruyoshi Hatanaka and Ken Takeuchi, “4-Times Faster Rising VPASS (10V), 15% Lower Power VPGM (20V), Wide Output Voltage Range Voltage Generator System for 4-Times Faster 3D-integrated Solid-State Drives,” IEEE Symp. on VLSI Circuits, pp.200-201, June 2011.

  • Ken Takeuchi, “NAND Flash and Storage Class Memory-integrated Hybrid Solid-State Drive (SSD),” Silicon Nanoelectronics Workshop (SNW) , Rump Session: Non-Volatile Memories for Storage Device and New Applications, June 2011. 【招待講演】

  • Kousuke Miyaji, Teruyoshi Hatanaka, Ryoji Yajima, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “Initialize & Weak-Program Erasing Scheme for Elimination of Cell VTH Shift Variation Due to History Effect in Ferroelectric (Fe)-NAND Flash Memories,” Silicon Nanoelectronics Workshop (SNW), pp.81-82, June 2011.

  • Xizhen Zhang, Kousuke Miyaji, Mitsue Takahashi, Ken Takeuchi, and Shigeki Sakai, “0.5V Bit-Line-Voltage Self-Boost-Programming in Ferroelectric-NAND Flash Memory,” IEEE International Memory Workshop, pp.155-158, May 2011.

  • Ken Takeuchi, “Storage Class Memory and Memory System Innovation – International Collaboration for Material, Device, Circuit, Signal Processing and OS Integration,” The Seventh International Nanotechnology Conference on Communication and Cooperation (INC7), May 2011.【招待講演】

  • Ken Takeuchi, “Future SSD Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】

  • Ken Takeuchi, “Future Nonvolatile Memory Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】

  • Shuhei Tanakamaru, Chinglin Hung, Atsushi Esumi, Mitsuyoshi Ito, Kai Li and Ken Takeuchi, “95% Lower Bit Error Rate, 35% Lower Power Intelligent Solid-State Drives (SSDs) with Asymmetric Coding and Stripe Pattern Elimination Algorithm,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 204-205, February 2011.

  • Ken Takeuchi, “Storage Class Memory,” 8th International Workshop on Future Information Processing Technologies ( IWFIPT ), October 2010.【招待講演】

  • Mayumi Fukuda, Kazuhide Higuchi, Shuhei Tanakamaru and Ken Takeuchi, “3.6-Times Higher Acceptable Raw Bit Error Rate, 97% Lower-Power, NV-RAM & NAND-Integrated Solid-State Drives (SSDs) with Adaptive Codeword ECC,” International Conference on Solid State Devices and Materials (SSDM), pp.1166-1167, September 2010.

  • Ken Takeuchi, “Current Status and Future Challenge of Fe-NAND/SRAM Cell Technology,” International Conference on Solid State Devices and Materials (SSDM), pp.1086-1087, September 2010. 【招待講演】

  • Kentaro Honda, Kousuke Miyaji, Shuhei Tanakamaru, Shinji Miyano and Ken Takeuchi, “Elimination of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor,” IEEE Custom Integrated Circuits Conference (CICC), September 2010.

  • Teruyoshi Hatanaka, Koichi Ishida, Tadashi Yasufuku, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai and Ken Takeuchi, “A 60% Higher Write Speed, 4.2Gbps, 24-Channel 3D-Solid State Drive (SSD) with NAND Flash Channel Number Detector and Intelligent Program-Voltage Booster,” IEEE Symp. on VLSI Circuits, pp.233-234, June 2010.

  • Kousuke Miyaji, Shuhei Tanakamaru, Kentaro Honda, Shinji Miyano and Ken Takeuchi, “70% Read Margin Enhancement by VTH Mismatch Self-Repair in 6T-SRAM with Asymmetric Pass Gate Transistor by Zero Additional Cost, Post-Process, Local Electron Injection,” IEEE Symp. on VLSI Circuits, pp.41-42, June 2010.

  • Kousuke Miyaji, Shinji Noda, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “A 1.0V Power Supply, 9.5GByte/sec Write Speed, Single-Cell Self-Boost Program Scheme for Ferroelectric NAND Flash SSD,” IEEE International Memory Workshop, pp.42-45, May 2010.

  • Shuhei Tanakamaru, Atsushi Esumi, Mitsuyoshi Ito, Kai Li and Ken Takeuchi, “Post-manufacturing, 17-times Acceptable Raw Bit Error Rate Enhancement, Dynamic Codeword Transition ECC Scheme for Highly Reliable Solid-State Drives, SSDs,” IEEE International Memory Workshop, pp88-91, May 2010.

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