T. Yokota, T. Sekitani, T. Nakagawa, Y. Noguchi, K. Takeuchi, U. Zschieschang, H. Klauk and T. Someya, “Control of switching voltage of low voltage organic complementary inverter using floating gate structure,” International Conference on Solid State Devices and Materials (SSDM), September 2011.
Xizhen Zhang, Mitsue Takahashi, Ken Takeuchi, and Shigeki Sakai, “First 64kb Ferroelectric-NAND Flash Memory Array with 7.5 V Program, 108 Endurance and Long Data Retention,” International Conference on Solid State Devices and Materials (SSDM), pp. 975-976, September 2011.
Koh Johguchi, Teruyoshi Hatanaka and Ken Takeuchi, “Adaptive Through-Silicon-Via Control with Clustering for 3D Solid-State-Drive Boost Converter System,” International Conference on Solid State Devices and Materials (SSDM), pp. 1057-1058, September 2011.
Kousuke Miyaji, Chinglin Hung and Ken Takeuchi, “Pushing Scaling Limit Due to Short Channel Effects and Channel Boosting Leakage from 13nm to 8nm with SOI NAND Flash Memory Cells,” International Conference on Solid State Devices and Materials (SSDM), pp. 128-129, September 2011.
Kazuhide Higuchi, Kousuke Miyaji, Koh Johguchi and Ken Takeuchi, “50nm HfO2 ReRAM with 50-Times Endurance Enhancement by Set/Reset Turnback Pulse & Verify Scheme,” International Conference on Solid State Devices and Materials (SSDM), pp. 1101-1102, September 2011.
Yasuhiro Shinozuka, Kousuke Miyaji and Ken Takeuchi, “A Zero Additional Process to Standard CMOS, 8F2, Scalable Embedded Flash Memory with Drain-side Assisted Erase Scheme,” International Conference on Solid State Devices and Materials (SSDM), pp. 981-982, September 2011.
Kousuke Miyaji, Yasuhiro Shinozuka, Shinji Miyano and Ken Takeuchi, “Statistical VTH Shift Variation Self-Convergence Scheme Using Near Threshold VWL Injection for Local Electron Injected Asymmetric Pass Gate Transistor SRAM,” IEEE Custom Integrated Circuits Conference (CICC), No. T9, September 2011.
Mitsue Takahashi, Xizhen Zhang, Le Van Hai, Kang Yan, Wei Zhang, Kousuke Miyaji, Ken Takeuchi and Shigeki Sakai, “NAND Flash Memory by Ferroelectric-Gate Field -Effect-Transistor Integration,” International Symposium on Integrated Functionalities (ISIF), August 2011.
Ken Takeuchi, “Green High Performance Storage Class Memory & NAND Flash Memory Hybrid SSD System,” IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp.369-370, August 2011. 【招待講演】
Ken Takeuchi, “ReRAM as High-Speed and High Capacity Storage Class Memory,” IEEE Symp. on VLSI Circuits, Special Evening Session: NVM Technology and New Application Opportunities, June 2011. 【招待講演】
Teruyoshi Hatanaka and Ken Takeuchi, “4-Times Faster Rising VPASS (10V), 15% Lower Power VPGM (20V), Wide Output Voltage Range Voltage Generator System for 4-Times Faster 3D-integrated Solid-State Drives,” IEEE Symp. on VLSI Circuits, pp.200-201, June 2011.
Ken Takeuchi, “NAND Flash and Storage Class Memory-integrated Hybrid Solid-State Drive (SSD),” Silicon Nanoelectronics Workshop (SNW) , Rump Session: Non-Volatile Memories for Storage Device and New Applications, June 2011. 【招待講演】
Kousuke Miyaji, Teruyoshi Hatanaka, Ryoji Yajima, Mitsue Takahashi, Shigeki Sakai and Ken Takeuchi, “Initialize & Weak-Program Erasing Scheme for Elimination of Cell VTH Shift Variation Due to History Effect in Ferroelectric (Fe)-NAND Flash Memories,” Silicon Nanoelectronics Workshop (SNW), pp.81-82, June 2011.
Xizhen Zhang, Kousuke Miyaji, Mitsue Takahashi, Ken Takeuchi, and Shigeki Sakai, “0.5V Bit-Line-Voltage Self-Boost-Programming in Ferroelectric-NAND Flash Memory,” IEEE International Memory Workshop, pp.155-158, May 2011.
Ken Takeuchi, “Storage Class Memory and Memory System Innovation – International Collaboration for Material, Device, Circuit, Signal Processing and OS Integration,” The Seventh International Nanotechnology Conference on Communication and Cooperation (INC7), May 2011.【招待講演】
Ken Takeuchi, “Future SSD Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】
Ken Takeuchi, “Future Nonvolatile Memory Technology,” Star Visitor Seminar, Data Storage Institute, Singapore, March 2011.【招待講演】
Shuhei Tanakamaru, Chinglin Hung, Atsushi Esumi, Mitsuyoshi Ito, Kai Li and Ken Takeuchi, “95% Lower Bit Error Rate, 35% Lower Power Intelligent Solid-State Drives (SSDs) with Asymmetric Coding and Stripe Pattern Elimination Algorithm,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 204-205, February 2011.
Ken Takeuchi, “Storage Class Memory,” 8th International Workshop on Future Information Processing Technologies ( IWFIPT ), October 2010.【招待講演】
Mayumi Fukuda, Kazuhide Higuchi, Shuhei Tanakamaru and Ken Takeuchi, “3.6-Times Higher Acceptable Raw Bit Error Rate, 97% Lower-Power, NV-RAM & NAND-Integrated Solid-State Drives (SSDs) with Adaptive Codeword ECC,” International Conference on Solid State Devices and Materials (SSDM), pp.1166-1167, September 2010.