Quantum error correction
Quantum computer is placed in several temperature regions. To increase the Qbit capacity, low-power small chip area QEC circuits are required and are placed in the cryogenic temperature of 4K. The decoder of Surface code, a protocol for QEC, is implemented in Computation in memory (CiM) using non-volatile memories and operates Long Short Term Memory (LSTM) algorithm. As a result, compact low-power QEC circuits are achieved. By utilizing non-volatile memories, data transfer of LSTM weights between room temperature region and extremely low temperature region is reduced and thus enables high-capacity quantum computers. Furthermore, the accuracy of QEC is maintained even if non-volatile memory has errors, paving the way for the new application of non-volatile memory in QEC circuits.
