Chao Sun, Member, Shun Okamoto, Shogo Hachiya, Tomoaki Yamada and Ken Takeuchi, “Design Guidelines of Storage Class Memory/Flash Hybrid Solid-State Drive Considering System Architecture, Algorithm and Workload Characteristic,” IEEE Transactions on Consumer Electronics, vol. 62, no. 3, pp. 267-274, August 2016.

Masafumi Doi, Tsukasa Tokutomi, Shogo Hachiya, Atsuro Kobayashi, Shuhei Tanakamaru, Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi, “Quick-Low-Density Parity Check (LDPC) and Dynamic Threshold Voltage (VTH) Optimization in 1Xnm Triple-Level Cell (TLC) NAND Flash Memory with Comprehensive Analysis of Endurance, Retention-Time and Temperature Variation,” Japanese Journal of Applied Physics (JJAP), vol. 55, no. 8, 084201, July 2016.

Sheyang Ning, Tomoko Ogura Iwasaki, Shuhei Tanakamaru, Darlene Viviani, Henry Huang, Monte Manning, Thomas Rueckes and Ken Takeuchi, “Reset-Check-Reverse-Flag Scheme on NRAM with 50% Bit Error Rate or 35% Parity Overhead and 16% Decoding Latency Reductions for Read-Intensive Storage Class Memory,” IEEE J. of Solid-State Circuits, vol. 51, no. 8, pp. 1938-1951, August 2016.

Hirofumi Takishita, Shuhei Tanakamaru, Sheyang Ning and Ken Takeuchi, “Trade-off of Performance, Reliability and Cost of SCM/NAND Flash Hybrid SSD,” IEICE Transactions on Electronics, vol. E99-C, vol. 4, pp. 444-451, April 2016.

Senju Yamazaki, Tomoko Ogura Iwasaki, Shogo Hachiya, Tomonori Takahashi and Ken Takeuchi, “A 72% Error Reduction Scheme Based on Temperature Acceleration for Long-Term Data Storage Applications: Cold Flash and Millennium Memories,” Solid-State Electronics, vol. 121, pp.25-33, July 2016.

Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro1, Tadahiro Kuroda and Ken Takeuchi, “An Inductively-Powered Wireless Solid-State Drive System with Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories,” IEEE J. of Solid-State Circuits, vol. 51, no. 4, pp. 1041-1050, April 2016.

Ken Takeuchi, “Memory System Architecture for the Data Centric Computing,” Japanese Journal of Applied Physics (JJAP), vol. 55, no. 4S, 04EA02, February 2016.

Masahiro Tanaka, Shogo Hachiya, Tomoya Ishii, Sheyang Ning, Kota Tsurumi and Ken Takeuchi, “0.6-1.0 V Operation Set/Reset Voltage (3V) Generator for 3D-integrated ReRAM and NAND flash Hybrid Solid-State Drive,” Japanese Journal of Applied Physics (JJAP), vol. 55, no. 4S, 04EE07, March 2016.

Sheyang Ning, Tomoko Ogura Iwasaki, Shogo Hachiya, Glen Rosendale, Monte Manning, Darlene Viviani, Thomas Rueckes and Ken Takeuchi, “Carbon Nanotube Memory Cell Array Program Error Analysis and Tradeoff between Reset Voltage and Verify Pulses,” Japanese Journal of Applied Physics (JJAP), vol. 55, no. 4S, 04EE01, February 2016.

Shuhei Tanakamaru, Shogo Hosaka, Koh Johguchi, Hirofumi Takishita and Ken Takeuchi, “Understanding Relation Between Performance and Reliability of NAND Flash / SCM Hybrid Solid-State Drive (SSD),” IEEE Transactions on VLSI Systems, vol. 24, no. 6, pp. 2208 – 2219, June 2016.

Tomoko Ogura Iwasaki, Sheyang Ning, Hiroki Yamazawa and Ken Takeuchi,　“Array-level Stability Enhancement of 50nm AlxOy ReRAM,” Solid-State Electronics, vol. 114, pp. 1-8, December 2015.

Sheyang Ning, Tomoko Ogura Iwasaki, Kazuya Shimomura, Koh Johguchi, Eisuke Yanagizawa, Glen Rosendale, Monte Manning, Darlene Viviani, Thomas Rueckes and Ken Takeuchi,　“Investigation and Improvement of Verify-program in Carbon Nanotube Based Non-volatile Memory,” IEEE Transactions on Electron Devices, vol. 62, no. 9, pp. 2837-2844, September 2015.

Tsukasa Tokutomi, Shuhei Tanakamaru, Tomoko Ogura Iwasaki and Ken Takeuchi,　“Advanced Error-Prediction LDPC with temperature compensation for Highly Reliable SSDs,” Solid-State Electronics, vol. 111, pp. 129-140, September 2015.

Chao Sun, Ayumi Soga, Chihiro Matsui, Asuka Arakawa and Ken Takeuchi, “LBA Scrambler: A NAND Flash Aware Data Management Scheme for High-Performance Solid-State Drives,” IEEE Transactions on VLSI Systems, vol. 24, no. 1, pp. 115-128, January 2015.

Takahiro Onagi, Chao Sun and Ken Takeuchi, “Design Guidelines of Storage Class Memory Based Solid-State Drives to Balance Performance, Power, Endurance and Cost,” Japanese Journal of Applied Physics (JJAP), vol. 54, no. 4S, 04DE04, April 2015.

Shuhei Tanakamaru, Yuta Kitamura, Senju Yamazaki, Tsukasa Tokutomi and Ken Takeuchi, “Highly Reliable Coding Methods for Emerging Applications: Archive and Enterprise Solid-State Drives (SSDs),” IEEE Transactions on Circuits and Systems I, vol. 62, no. 3, pp. 771-780, March 2015.

Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning and Ken Takeuchi, “Design Methodology for Highly Reliable, High Performance ReRAM and 3-bit/cell MLC NAND Flash Solid-State Storage,” IEEE Transactions on Circuits and Systems I, vol. 62, no. 3, pp. 844-853, March 2015.

Teruyoshi Hatanaka, Koh Johguchi and Ken Takeuchi, “Experimental investigation of program-voltage (20 V) generation with boost converter for 3D-stacked NAND Flash SSD,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 5, no. 2, pp. 188-193, February 2015.

Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “A Design Strategy of Error-Prediction Low-Density Parity-Check (EP-LDPC) Error-Correcting Code (ECC) and Error-Recovery Schemes for Scaled NAND Flash Memories,” IEICE Transactions on Electronics, vol. E98-C, vol. 1, pp. 53-61, 2015.

Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi,　“50 nm AlxOy ReRAM program 31% energy, 1.6× endurance, and 3.6× speed improvement by advanced cell condition adaptive verify-reset,” Solid-State Electronics, vol. 103, pp. 64-72, January 2015.