Takahiro Onagi, Chao Sun and Ken Takeuchi, “Design Guidelines of Storage Class Memory Based Solid-State Drives to Balance Performance, Power, Endurance and Cost,” Japanese Journal of Applied Physics (JJAP), vol. 54, no. 4S, 04DE04, April 2015.

Shuhei Tanakamaru, Yuta Kitamura, Senju Yamazaki, Tsukasa Tokutomi and Ken Takeuchi, “Highly Reliable Coding Methods for Emerging Applications: Archive and Enterprise Solid-State Drives (SSDs),” IEEE Transactions on Circuits and Systems I, vol. 62, no. 3, pp. 771-780, March 2015.

Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning and Ken Takeuchi, “Design Methodology for Highly Reliable, High Performance ReRAM and 3-bit/cell MLC NAND Flash Solid-State Storage,” IEEE Transactions on Circuits and Systems I, vol. 62, no. 3, pp. 844-853, March 2015.

Teruyoshi Hatanaka, Koh Johguchi and Ken Takeuchi, “Experimental investigation of program-voltage (20 V) generation with boost converter for 3D-stacked NAND Flash SSD,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 5, no. 2, pp. 188-193, February 2015.

Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “A Design Strategy of Error-Prediction Low-Density Parity-Check (EP-LDPC) Error-Correcting Code (ECC) and Error-Recovery Schemes for Scaled NAND Flash Memories,” IEICE Transactions on Electronics, vol. E98-C, vol. 1, pp. 53-61, 2015.

Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi,　“50 nm AlxOy ReRAM program 31% energy, 1.6× endurance, and 3.6× speed improvement by advanced cell condition adaptive verify-reset,” Solid-State Electronics, vol. 103, pp. 64-72, January 2015.

Chao Sun, Asuka Arakawa and Ken Takeuchi, “SEA-SSD: A Storage Engine Assisted SSD with Application-Coupled Simulation Platform,” IEEE Transactions on Circuits and Systems I, vol. 62, no. 1, pp. 120-129, January 2015.

Chao Sun, Tomoko Ogura Iwasaki, Takahiro Onagi, Koh Johguchi and Ken Takeuchi, “Cost, Capacity and Performance Analyses for Hybrid SCM/NAND Flash SSD,” IEEE Transactions on Circuits and Systems I, vol. 61, no. 8, pp. 2360 – 2369, August 2014.

Koh Johguchi, Kasuaki Yoshioka and Ken Takeuchi, “NAND Phase Change Memory with Block-Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance,” IEICE Transactions on Electronics, vol. E97-C, no. 4, pp. 351-359, April 2014.

Koh Johguchi, Toru Egami, Kousuke Miyaji and Ken Takeuchi, “A Temperature Tracking Read Reference Current and Write Voltage Generator for Multi-Level Phase Change Memories,” IEICE Transactions on Electronics, vol. E97-C, no. 4, pp. 342-350, April 2014.

Masafumi Doi, Shuhei Tanakamaru and Ken Takeuchi, “A Scaling Scenario of Asymmetric Coding to reduce both Data Retention and Program Disturbance of NAND Flash Memories,” Solid-State Electronics, vol. 92, pp. 63-69, April 2014.

Toru Egami, Koh Johguchi, Senju Yamazaki and Ken Takeuchi,　“Investigation of Multi-Level-Cell and SET Operations on Super-Lattice Phase Change Memories,” Japanese Journal of Applied Physics (JJAP), vol. 53, 04ED02, April 2014.

Sheyang Ning, Tomoko Ogura Iwasaki and Ken Takeuchi,　“50nm AlxOy ReRAM Array Program Bit Error Reduction and High Temperature Operation,” Japanese Journal of Applied Physics (JJAP), vol. 53, 04ED09, April 2014.

Shogo Hachiya, Koh Johguchi, Kousuke Miyaji and Ken Takeuchi,　“Hybrid Triple-Level-Cell (TLC) /Multi-Level-Cell (MLC) NAND Flash Storage Array with Chip Exchangeable Method,” Japanese Journal of Applied Physics (JJAP), vol. 53, 04EE04, April 2014.

Shuhei Tanakamaru, Masafumi Doi and Ken Takeuchi, “NAND Flash Memory / ReRAM Hybrid Unified Solid-State-Storage Architecture,” IEEE Transactions on Circuits and Systems I, vol. 61, no. 4, pp. 1119-1132, April 2014.

Kousuke Miyaji, Yuki Yanagihara, Reo Hirasawa, Sheyang Ning and Ken Takeuchi,　“Control Gate Length, Spacing, Channel Hole Diameter and Stacked Layer Number Design for BiCS-Type 3D-Stackable NAND Flash Memory,” Japanese Journal of Applied Physics (JJAP), vol. 53, 024201, January 2014.

Kazuhide Higuchi, Tomoko Ogura Iwasaki and Ken Takeuchi, “Evaluation of Voltage vs. Pulse Width Modulation and Feedback during Set/Reset Verify-Programming to Achieve 10 Million Cycles for 50nm HfO2 ReRAM,” Solid-State Electronics, vol. 91, pp. 67-73, January 2014.

Ken Takeuchi, “NAND Flash Application and Solution,” IEEE Solid-State Circuits Magazine, vol. 5, no. 4, pp. 34-40, December, 2013.

Shuhei Tanakamaru, Yuki Yanagihara and Ken Takeuchi, “Error-Prediction LDPC and Error-Recovery Schemes for Highly Reliable Solid-State Drives (SSDs),” IEEE J. of Solid-State Circuits, vol. 48, no. 11, pp. 1-14, November, 2013.

Chao Sun, Kousuke Miyaji, Koh Johguchi　and Ken Takeuchi, “A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD,” IEEE Transactions on Circuits and Systems I, vol. 61, no. 2, pp. 382-392, February 2014.