Kyoji Mizoguchi, Tomonori Takahashi, Seiichi Aritome and Ken Takeuchi, “Data-Retention Characteristics Comparison of 2D and 3D TLC NAND Flash Memories,” IEEE International Memory Workshop, May 15, 2017.

Yoshiaki Deguchi, Toshiki Nakamura, Atsuro Kobayashi and Ken Takeuchi, “12x Bit-Error Acceptable, 300x Extended Data-Retention Time, Value-Aware SSD with Vertical 3D-TLC NAND Flash Memories for Image Recognition,” IEEE Custom Integrated Circuits Conference (CICC), May 1, 2017.

Kazuki Maeda, Shouhei Fukuyama, Ryutaro Yasuhara, Satoshi Mishima and Ken Takeuchi, “Error Recovery of Low Resistance State in 40nm TaOx-based ReRAM,” IEEE International Reliability Physics Symposium (IRPS), pp.5A-4.1-5A-4.6, April 6, 2017.

Seiichi Aritome, Tomonori Takahashi, Kyoji Mizoguchi and Ken Takeuchi, “RTN Impact on Data-Retention Failure/Recovery in Scaled (~1Ynm) TLC NAND Flash Memories,” IEEE International Reliability Physics Symposium (IRPS) Poster, pp.PM-13.1-PM-13.4, April 5, 2017.

Yusuke Yamaga, Chihiro Matsui, Yukiya Sakaki, Atsuro Kobayashi and Ken Takeuchi, “Real Usage-based Precise Reliability Test by Extracting Read/Write/Retention-Mixed Real-life Access of NAND Flash Memory from System-level SSD Emulator,” IEEE International Reliability Physics Symposium (IRPS) Poster, pp.PM-12.1-PM-12.5, April 5, 2017.

Atsuro Kobayashi, Hikaru Watanabe, Yukiya Sakaki, Seiichi Aritome and Ken Takeuchi, “Investigation of Read Disturb Error in 1Ynm NAND Flash Memories for System Level Solution,” IEEE International Reliability Physics Symposium (IRPS) Poster, pp. PM-6.1-PM-6.4, April 5, 2017.

Tomoaki Yamada, Atsuya Suzuki, Yusuke Sugiyama, Chihiro Matsui and Ken Takeuchi, “Comprehensive Analysis on SCM Specifications for High-Performance SCM/NAND Flash Hybrid SSD with Through-Silicon Via,” International Conference on Electronic Packageing (ICEP), pp. 268-271, April 20, 2017.

Hirofumi Takishita, Yutaka Adachi and Ken Takeuchi, “ReRAM-based SSD Performance Considering Verify-program Cycles and ECC Capabilities,” 8th Non-Volatile Memories Workshop 2017 (NVMW), March 14, 2017.

Toshiki Nakamura, Yoshiaki Deguchi, Atsuro Kobayashi and Ken Takeuchi, “Heterogeneous-Integrated LDPC ECC of TLC NAND Flash Memory for Read-Hot & Cold Mixed Data Storage,” 8th Non-Volatile Memories Workshop 2017 (NVMW), March 2017.

Kota Tsurumi, Masahiro Tanaka and Ken Takeuchi, “0.6 V operation, 16 % Faster Set/Reset ReRAM Boost Converter with Adaptive Buffer Voltage for ReRAM and NAND Flash Hybrid Solid-State Drives,” The International Symposium on Quality Electronic Design (ISQED), pp.81-86, March 14, 2017.

Masahiro Tanaka, Kota Tsurumi, Tomoya Ishii and Ken Takeuchi, “Heterogeneously Integrated Program Voltage Generator for 1.0V Operation NAND Flash with Best Mix & Match of Standard CMOS Process and NAND Flash Process,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp.67-70, September 14, 2016.

Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama and Ken Takeuchi, “8.9-times Performance Improvement by Tri-Hybrid Storage System with SCM and MLC/TLC NAND Flash Memory,” International Conference on Solid State Devices and Materials (SSDM), pp.105-106, September 29, 2016.

Yoshiaki Deguchi, Atsuro Kobayashi and Ken Takeuchi, “47% Data-Retention Error Reduction of TLC NAND Flash Memory by Introducing Stress Relaxation Period with Round-Robin Wear-leveling,” International Conference on Solid State Devices and Materials (SSDM), pp.107-108, September 29, 2016.

Chihiro Matsui, Tomoaki Yamada, Shun Okamoto, Chao Sun and Ken Takeuchi, “Application-Dependent SCM/NAND Flash Hybrid Solid-State Drive Design,” Flash Memory Summit, August 11, 2016.

Sheyang Ning, Tomoko Ogura Iwasaki, Darlene Viviani, Henry Huang, Monte Manning, Thomas Rueckes and Ken Takeuchi, “NRAM: high performance, highly reliable emerging memory,” Flash Memory Summit, August 11, 2016.

Tomoaki Yamada, Chihiro Matsui and Ken Takeuchi, “Optimal Combinations of SCM Characteristics and Non-volatile Cache Algorithms for High-Performance SCM/NAND Flash Hybrid SSD,” Silicon Nanoelectronics Workshop (SNW) Poster, pp. P1-18, June 12-13,2016.

Hirofumi Takishita, Takahiro Onagi and Ken Takeuchi, “Storage Class Memory Based SSD Performance in Consideration of Error Correction Capabilities and Write/Read Latencies,” Silicon Nanoelectronics Workshop (SNW) Poster, pp. P1-20, June 12-13,2016.

Takashi Inose, Tomoko Ogura Iwasaki, Sheyang Ning, Darlene Viviani, Monte Manning, X. M. Henry Huang, Thomas Rueckes and Ken Takeuchi, “Reliability Study of Carbon Nanotube Memory after Various Cycling Conditions,” Silicon Nanoelectronics Workshop (SNW) Poster, pp. P1-17, June 12-13, 2016.

Atsuro Kobayashi, Tsukasa Tokutomi and Ken Takeuchi, “Versatile TLC NAND Flash Memory Control to Reduce Read Disturb Errors by 85% and Extend Read Cycles by 6.7-times of Read-Hot and Cold Data for Cloud Data Centers,” IEEE Symp. on VLSI Technology, pp. 126-127, June 16, 2016.

Yusuke Yamaga, Chihiro Matsui, Shogo Hachiya and Ken Takeuchi, “Application Optimized Adaptive ECC with Advanced LDPCs to Resolve Trade-off among Reliability, Performance, and Cost of Solid-State Drives,” IEEE International Memory Workshop, pp.129-132, May 17, 2016.